Logic Levels - SparkFun Learn (2024)

Contributors: bri_huang

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Introduction

We live in a world of analog signals. In digital electronics, however, there are only two states -- ON or OFF. Using these two states, devices can encode, transport, and control a great deal of data. Logic levels, in the broadest sense, describes any specific, discrete state that a signal can have. In digital electronics, we generally restrict our study to two logic states - Binary 1 and Binary 0.

Covered in This Tutorial

  • What is a logic level?
  • What are common standards for logic levels in digital electronics.
  • How to interface between different technologies.
  • Level shifting
  • Voltage Buck-Boost Regulators

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This tutorial builds on basic electronics knowledge. If you haven't already, consider reading these tutorials:

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What is a Logic Level?

Put simply, a logic level is a specific voltage or a state in which a signal can exist. We often refer to the two states in a digital circuit to be ON or OFF. Represented in binary, an ON translates to a binary 1, and an OFF translates to a binary 0. In Arduino, we call these signals HIGH or LOW, respectively. There are several different technologies that have evolved over the past 30 years in electronics to define the various voltage levels.

Logic 0 or Logic 1

Digital electronics rely on binary logic to store, process, and transmit data or information. Binary Logic refers to one of two states -- ON or OFF. This is commonly translated as a binary 1 or binary 0. A binary 1 is also referred to as a HIGH signal and a binary 0 is referred to as a LOW signal.

The strength of a signal is typically described by its voltage level. How is a logic 0 (LOW) or a logic 1 (HIGH) defined? Manufacturers of chips generally define these in their spec sheets. The most common standard is TTL or Transistor-Transistor Logic.

Active-Low and Active-High

When working with ICs and microcontrollers, you'll likely encounter pins that are active-low and pins that are active-high. Simply put, this just describes how the pin is activated. If it's an active-low pin, you must "pull" that pin LOW by connecting it to ground. For an active high pin, you connect it to your HIGH voltage (usually 3.3V/5V).

For example, let's say you have a shift register that has a chip enable pin, CE. If you see the CE pin anywhere in the datasheet with a line over it like this, CE, then that pin is active-low. The CE pin would need to be pulled to GND in order for the chip to become enabled. If, however, the CE pin doesn't have a line over it, then it is active high, and it needs to be pulled HIGH in order to enable the pin.

Many ICs will have both active-low and active-high pins intermingled. Just be sure to double check for pin names that have a line over them. The line is used to represent NOT (also known as bar). When something is NOTTED, it changes to the opposite state. So if an active-high input is NOTTED, then it is now active-low. Simple as that!

TTL Logic Levels

A majority of systems we use rely on either 3.3V or 5 V TTL Levels. TTL is an acronym for Transistor-Transistor Logic. It relies on circuits built from bipolar transistors to achieve switching and maintain logic states. Transistors are basically fancy-speak for electrically controlled switches. For any logic family, there are a number of threshold voltage levels to know. Below is an example for standard 5V TTL levels:

VOH -- Minimum OUTPUT Voltage level a TTL device will provide for a HIGH signal.

VIH -- Minimum INPUT Voltage level to be considered a HIGH.

VOL -- Maximum OUTPUT Voltage level a device will provide for a LOW signal.

VIL -- Maximum INPUT Voltage level to still be considered a LOW.

You will notice that the minimum output HIGH voltage (VOH) is 2.7 V. Basically, this means that output voltage of the device driving HIGH will always be at least 2.7 V. The minimum input HIGH voltage (VIH) is 2 V, or basically any voltage that is at least 2 V will be read in as a logic 1 (HIGH) to a TTL device.

You will also notice that there is cushion of 0.7 V between the output of one device and the input of another. This is sometimes referred to as noise margin.

Likewise, the maximum output LOW voltage (VOL) is 0.4 V. This means that a device trying to send out a logic 0 will always be below 0.4 V. The maximum input LOW voltage (VIL) is 0.8 V. So, any input signal that is below 0.8 V will still be considered a logic 0 (LOW) when read into the device.

What happens if you have a voltage that is in between 0.8 V and 2 V? Well, your guess is as good as mine. Honestly, this range of voltages is undefined and results in an invalid state, often referred to as floating. If an output pin on your device is “floating” in this range, there is no certainty with what the signal will result in. It may bounce arbitrarily between HIGH and LOW.

Here is another way of looking at the input / output tolerances for a generic TTL device.

3.3 V CMOS Logic Levels

As technology has advanced, we have created devices that require lower power consumption and run off a lower base voltage (Vcc = 3.3 V instead of 5 V). The fabrication technique is also a bit different for 3.3 V devices that allows a smaller footprint and lower overall system costs.

In order to ensure general compatibility, you will notice that most of the voltage levels are almost all the same as 5 V devices. A 3.3 V device can interface with a 5V device without any additional components. For example, a logic 1 (HIGH) from a 3.3 V device will be at least 2.4 V. This will still be interpreted as a logic 1 (HIGH) to a 5V system because it is above the VIH of 2 V.

A word of caution, however, is when going the other direction and interfacing from a 5 V to a 3.3 V device to ensure that the 3.3 V device is 5 V tolerant. The specification you are interested in is the maximum input voltage. On certain 3.3 V devices, any voltages above 3.6 V will cause permanent damage to the chip. You can use a simple voltage divider (like a 1KΩ and a 2KΩ) to knock down 5 V signals to 3.3 V levels or use one of our logic level shifters.

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          Arduino Logic Levels

          Looking at the datasheet for the ATMega328 (the primary microcontroller behind the Arduino Uno and the Sparkfun RedBoard), you might notice that the voltage levels are slightly different.

          The Arduino is built on a slightly more robust platform. The most noticable difference is that the invalid region of voltages is only between 1.5 V and 3.0 V. The noise margin is greater on the Arduino and it has a higher threshold for a LOW signal. This makes building interfaces and working with other hardware much simpler.

          Interested in learning more foundational topics?

          See our Engineering Essentials page for a full list of cornerstone topics surrounding electrical engineering.

          Take me there!

          Logic Levels - SparkFun Learn (10)

          Resources and Going Further

          Now that you've got the gist of one of the most common concepts in electronics, there's a world of new stuff to learn!

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          References

          Logic Levels - SparkFun Learn (2024)

          FAQs

          Logic Levels - SparkFun Learn? ›

          Put simply, a logic level is a specific voltage or a state in which a signal can exist. We often refer to the two states in a digital circuit to be ON or OFF. Represented in binary, an ON translates to a binary 1, and an OFF translates to a binary 0. In Arduino, we call these signals HIGH or LOW, respectively.

          What are the logic levels for 5v CMOS? ›

          For a CMOS gate operating at a power supply voltage of 5 volts, the acceptable input signal voltages range from 0 volts to 1.5 volts for a “low” logic state, and 3.5 volts to 5 volts for a “high” logic state.

          What is the logic level for 3.3 V? ›

          The logic level thresholds for 3.3V CMOS are a known standard. For a 3.3V CMOS device to acknowledge a logic high or low, the required voltages are as follows: Logic low - input must be between 0V and 0.8V. Logic high - input must be between 2V and 3.3V.

          How many levels of logic are there? ›

          There are six different logical levels: (6)Group, (5)Identity, (4)Beliefs and Values, (3)Capabilities, (2)Behavior, and (1) Environment.

          What are the logic levels for TTL? ›

          TTL (Transistor-Transistor Logic): A TTL input signal is defined as "low" when between 0 V and 0.8 V with respect to the ground terminal. A TTL input signal is defined as "high" when between 2 V and 5 V.

          Is TTL 3.3 or 5V? ›

          TTL Logic Levels. A majority of systems we use rely on either 3.3V or 5 V TTL Levels. TTL is an acronym for Transistor-Transistor Logic. It relies on circuits built from bipolar transistors to achieve switching and maintain logic states.

          What is logic level 1.8 V? ›

          1.8 volt logic support allows for a multiplexer and an MCU or processor to communicate at the same 1.8 volt logic level. To facilitate this communication, the system must ensure that the voltage output high level, VOH, is higher than the voltage input high threshold, VIH, of the device that it is controlling.

          Why use 3.3 V instead of 5V? ›

          So, why is the 3.3V a standard power supply voltage level? Because power consumption has always been a concern for designers, lower power supply voltage levels were introduced to make more power-efficient circuits and devices.

          How to convert 3.3 V logic to 5V? ›

          You can use a transistor to do the level shifting. You place a resistor from 5v to the collector of an NPN transistor and connect that collector to the logic input. You connect a resistor from the base of the transistor to the 3.3v logic circuit. This however inverts the logic.

          How do you regulate 5V to 3.3 V? ›

          The easiest way to convert a 5V analog signal to a 3.3V analog signal is to use a resistor divider with an R1:R2 ratio of 1.7:3.3. However, there are some problems with this approach. 1) The attenuator may be connected to a capacitive load, forming an undesired low-pass filter.

          What is the difference between TTL and CMOS logic levels? ›

          There is a substantial difference in the voltage level range for both. For TTL it is 4.75 V to 5.25 V while for CMOS it ranges between 0 to 1/3 VDD at a low level and 2/3VDD to VDD at high levels. CMOS technology is more economical and preferred more as compared to the TTL logic.

          What is the logic level MOSFET? ›

          It means the MOSFET can be driven by the output voltage (4 to 5 V) of general-purpose logic IC. When the general-purpose logic IC does not have enough output current capability, the MOSFET cannot be driven.

          What is the strongest logic? ›

          In mathematical logic, Lindström's theorem (named after Swedish logician Per Lindström, who published it in 1969) states that first-order logic is the strongest logic (satisfying certain conditions, e.g. closure under classical negation) having both the (countable) compactness property and the (downward) Löwenheim– ...

          Which logic family is fastest? ›

          Emitter-coupled logic (ECL) is the fastest logic circuit family available for conventional logic-system design.

          Is TTL still used? ›

          The term "TTL" is applied to many successive generations of bipolar logic, with gradual improvements in speed and power consumption over about two decades. The most recently introduced family 74Fxx is still sold today (as of 2019), and was widely used into the late 90s.

          What is logic 0? ›

          "Logic 0" and "logic 1" represent binary digits (0 and 1) or Boolean logic conditions (true and false). Thinking in terms of logic 0 and logic 1 allow engineers to design circuits and logic gates at a high level of abstraction that is removed from implementation considerations.

          What are the logic values of CMOS? ›

          In cmos circuits (circuits built with cmos gates) logical values of 1 and 0 are defined as the passage or non-passage of current, respectively. Logical values of 0 and 1 are defined as a voltage close to 0 V and a voltage close to the circuit supply voltage respectively.

          What is the high level noise margin for 5V CMOS? ›

          2.2. 4 Noise margin
          Empty CellNoise-Margin Measures
          TechnologyVDDVIL
          5-V CMOS5.01.5
          5-V TTL5.00.8
          3.3-V LVTTL3.30.8
          2 more rows

          What are the logic low and high levels of CMOS ICS? ›

          Input voltages ranging from 3.5 to 5 V are recognized as HIGH and voltages from 0 to 1.5 V as LOW. It may appear that CMOS output logic levels, using a 5 V power supply, completely conform to the TTL logic level ranges of 0 to 0.8 V for LOW and 2.0 to 5.5 V for HIGH.

          What is the logic low voltage for CMOS? ›

          LVC logic devices are specified over 1.65 V to 3.6 V (standard) or 1.65 V to 5.5 V (PicoGate). With a balanced output drive of 24 mA and typical propagation delay of 4 ns, the LVC family includes buffers/line drivers, transceivers, gates, analog switches and translators .

          References

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